[0000.065] I> MB1 (version: 0.32.0.0-t234-54845784-57325615)
[0000.070] I> t234-A01-1-Silicon (0x12347) Prod
[0000.074] I> Boot-mode : Coldboot
[0000.077] I> Emulation: 
[0000.080] I> Entry timestamp: 0x00000000
[0000.084] I> last_boot_error: 0x0
[0000.087] I> BR-BCT: preprod_dev_sign: 0
[0000.090] I> rst_source: 0x0, rst_level: 0x0
[0000.095] I> Task: Bootchain select WAR set (0x5000ba65)
[0000.100] I> Task: Enable SLCG (0x5000bab1)
[0000.104] I> Task: CRC check (0x5001ea19)
[0000.108] I> Task: Initialize MB2 params (0x5000cb51)
[0000.113] I> MB2-params @ 0x40060000
[0000.117] I> Task: Crypto init (0x5001d981)
[0000.121] I> Task: Secure debug controls (0x5000c0a9)
[0000.126] I> Task: strap war set (0x5000ba2d)
[0000.130] I> Task: Initialize SOC Therm (0x5001bd35)
[0000.135] I> Task: Program NV master stream id (0x5000c05d)
[0000.140] I> Task: Verify boot mode (0xd4820f1)
[0000.146] I> Task: Alias fuses (0x5001095d)
[0000.151] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0000.158] I> Task: Print SKU type (0x5000f5f1)
[0000.162] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c8
[0000.167] I> FUSE_OPT_GPC_DISABLE = 0x00000002
[0000.171] I> FUSE_OPT_TPC_DISABLE = 0x000000f0
[0000.176] I> FUSE_OPT_DLA_DISABLE = 0x00000003
[0000.180] I> FUSE_OPT_PVA_DISABLE = 0x00000001
[0000.184] I> FUSE_OPT_NVENC_DISABLE = 0x00000001
[0000.189] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0000.193] I> FUSE_OPT_FSI_DISABLE = 0x00000001
[0000.197] I> FUSE_OPT_EMC_DISABLE = 0x0000000c
[0000.202] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0000.206] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0000.210] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0000.214] I> FUSE_SKU_INFO_0 = 0xd5
[0000.217] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS 
[0000.221] I> FUSE_PACKAGE_INFO_0 = 0x2
[0000.225] I> SKU: Prod
[0000.227] I> Task: Boost clocks (0x500148a1)
[0000.231] I> Initializing PLLC2 for AXI_CBB.
[0000.236] I> AXI_CBB : src = 35, divisor = 0
[0000.240] I> Task: Voltage monitor (0x50014b49)
[0000.244] I> VMON: Vmon re-calibration and fine tuning done
[0000.249] I> Task: UPHY init (0x5000d065)
[0000.255] I> HSIO UPHY init done
[0000.258] E> Skipping GBE UPHY config
[0000.262] I> Task: Boot device init (0x50000be9)
[0000.266] I> Boot_device: QSPI_FLASH instance: 0
[0000.271] I> Qspi clock source : pllc_out0
[0000.275] I> QSPI Flash: Macronix 64MB
[0000.279] I> QSPI-0l initialized successfully
[0000.283] I> Task: TSC init (0x50020a4d)
[0000.287] I> Task: Load membct (0x50011fe9)
[0000.291] I> RAM_CODE 0x4000421
[0000.294] I> Loading MEMBCT 
[0000.297] I> Slot: 0
[0000.299] I> Binary[0] block-0 (partition size: 0x40000)
[0000.304] I>  get_binary_info: Binary name: MEM-BCT-0
[0000.309] I> Size of crypto header is 8192
[0000.313] I> BCH load address is : 0x40050000
[0000.317] I> Size of crypto header is 8192
[0000.321] I> BCH of MEM-BCT-0 read from storage
[0000.325] I> BCH address is : 0x40050000
[0000.329] I> MEM-BCT-0 header integrity check is success
[0000.335] I> Binary magic in BCH component 0 is MEM0
[0000.339] I> component binary type is 0
[0000.344] I> MEM-BCT-0 binary is read from storage
[0000.349] I> MEM-BCT-0 binary integrity check is success
[0000.354] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0000.360] I> RAM_CODE 0x4000421
[0000.366] I> RAM_CODE 0x4000421
[0000.370] I> Task: Load Page retirement list (0x500115b1)
[0000.375] I> Task: SDRAM params override (0x50011fc5)
[0000.380] I> Task: Save mem-bct info (0x50014fa1)
[0000.384] I> Task: Carveout allocate (0x50015005)
[0000.389] I> RCM blob carveout will not be allocated
[0000.394] I> ECC region[0]: Start:0x0, End:0x0
[0000.398] I> ECC region[1]: Start:0x0, End:0x0
[0000.402] I> ECC region[2]: Start:0x0, End:0x0
[0000.406] I> ECC region[3]: Start:0x0, End:0x0
[0000.411] I> ECC region[4]: Start:0x0, End:0x0
[0000.415] I> Non-ECC region[0]: Start:0x80000000, End:0x280000000
[0000.421] I> Non-ECC region[1]: Start:0x0, End:0x0
[0000.426] I> Non-ECC region[2]: Start:0x0, End:0x0
[0000.430] I> Non-ECC region[3]: Start:0x0, End:0x0
[0000.435] I> Non-ECC region[4]: Start:0x0, End:0x0
[0000.445] I> allocated(CO:31) base:0x278000000 size:0x8000000 align: 0x8000000
[0000.452] I> allocated(CO:43) base:0x274000000 size:0x4000000 align: 0x200000
[0000.459] I> allocated(CO:20) base:0x272000000 size:0x2000000 align: 0x2000000
[0000.466] I> allocated(CO:24) base:0x270000000 size:0x2000000 align: 0x2000000
[0000.473] I> allocated(CO:28) base:0x26e000000 size:0x2000000 align: 0x2000000
[0000.480] I> allocated(CO:22) base:0x26d000000 size:0x1000000 align: 0x1000000
[0000.487] I> allocated(CO:35) base:0x26c200000 size:0xe00000 align: 0x10000
[0000.494] I> allocated(CO:02) base:0x26b800000 size:0x800000 align: 0x800000
[0000.501] I> allocated(CO:03) base:0x26b000000 size:0x800000 align: 0x800000
[0000.508] I> allocated(CO:06) base:0x26a800000 size:0x800000 align: 0x800000
[0000.515] I> allocated(CO:10) base:0x26a000000 size:0x800000 align: 0x800000
[0000.522] I> allocated(CO:56) base:0x269800000 size:0x800000 align: 0x200000
[0000.528] I> allocated(CO:07) base:0x269400000 size:0x400000 align: 0x400000
[0000.535] I> allocated(CO:33) base:0x269000000 size:0x400000 align: 0x200000
[0000.542] I> allocated(CO:23) base:0x26c000000 size:0x200000 align: 0x200000
[0000.549] I> allocated(CO:01) base:0x268f00000 size:0x100000 align: 0x100000
[0000.556] I> allocated(CO:04) base:0x268e00000 size:0x100000 align: 0x100000
[0000.563] I> allocated(CO:05) base:0x268d00000 size:0x100000 align: 0x100000
[0000.570] I> allocated(CO:08) base:0x268c00000 size:0x100000 align: 0x100000
[0000.577] I> allocated(CO:09) base:0x268b00000 size:0x100000 align: 0x100000
[0000.584] I> allocated(CO:15) base:0x268a00000 size:0x100000 align: 0x100000
[0000.591] I> allocated(CO:17) base:0x268900000 size:0x100000 align: 0x100000
[0000.598] I> allocated(CO:27) base:0x268800000 size:0x100000 align: 0x100000
[0000.605] I> allocated(CO:42) base:0x268700000 size:0x100000 align: 0x100000
[0000.612] I> allocated(CO:54) base:0x268680000 size:0x80000 align: 0x80000
[0000.618] I> allocated(CO:34) base:0x268670000 size:0x10000 align: 0x10000
[0000.625] I> allocated(CO:47) base:0x268200000 size:0x400000 align: 0x200000
[0000.632] I> allocated(CO:72) base:0x268000000 size:0x200000 align: 0x10000
[0000.639] I> allocated(CO:48) base:0x268650000 size:0x20000 align: 0x10000
[0000.646] I> allocated(CO:69) base:0x268630000 size:0x20000 align: 0x10000
[0000.652] I> allocated(CO:49) base:0x268620000 size:0x10000 align: 0x10000
[0000.659] I> allocated(CO:50) base:0x268610000 size:0x10000 align: 0x10000
[0000.666] I> NSDRAM base: 0x80000000, end: 0x268670000
[0000.671] I> Task: Thermal check (0x50021d55)
[0000.675] I> max_chip_limit = 105
[0000.678] I> min_chip_limit = -28
[0000.681] I> max temp read = 67
[0000.684] I> min temp read = 63
[0000.687] I> Task: Update FSI SCR with thermal fuse data (0x50021e61)
[0000.693] I> Task: Enable WDT 5th expiry (0x50021a41)
[0000.698] I> Task: I2C register (0x50000b85)
[0000.702] I> Task: Reset FSI (0x500148b1)
[0000.706] I> Task: Pinmux init (0x5001397d)