/*
 * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#include "dt-bindings/clock/tegra234-clock.h"
#include "tegra194-camera-rbpcv2-sc432ai.dtsi"

#define CAMERA_I2C_MUX_BUS(x) (0x1E + x)

/ {
    i2c@c250000 {
		tca6408_20: tca6408@20 {
			compatible = "ti,tca6408";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0x20>;
			vcc-supply = <&p3768_vdd_3v3_sys>;
			tca6408_20_outlow {
				/*
				 * GPIO-0 : PWDN_CAM1
				 * GPIO-1 : PWDN_CAM2
				 * GPIO-2 : PWDN_CAM3
				 * GPIO-3 : PWDN_CAM4
				 * GPIO-4 : PWDN_CAM5
				 * GPIO-5 : PWDN_CAM6
                 		 * GPIO-6 : NC6
                 		 * GPIO-7 : NC7
				 */
				gpio-hog;
				gpios = <0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0>;
				output-low;
				label = "tca6408_20_outlow_0",
					"tca6408_20_outlow_1",
					"tca6408_20_outlow_2",
					"tca6408_20_outlow_3",
					"tca6408_20_outlow_4",
					"tca6408_20_outlow_5",
					"tca6408_20_outlow_6",
					"tca6408_20_outlow_7";
			};
			tca6408_20_outhigh {
				status = "disabled";
			};
			tca6408_20_input {
				status = "disabled";
			};
        };
	};	

    i2c@3180000 {
		tca9548@70 {
			compatible = "nxp,pca9548";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x70>;
			vcc-supply = <&p3768_vdd_1v8>;
			//i2c-mux-idle-disconnect;
            		skip_mux_detect;
			force_bus_start = <CAMERA_I2C_MUX_BUS(0)>;
			i2c_0:i2c@5 {
				reg = <5>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-mux,deselect-on-exit;
				rbpcv3_sc432ai_a@36 {
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
						 <&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					clock-frequency = <24000000>;
                    snr-role = <0>;
					reset-gpios = <&tca6408_20 5 GPIO_ACTIVE_HIGH>;
				};
			};
			i2c_1:i2c@1 {
				reg = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-mux,deselect-on-exit;
				rbpcv3_sc432ai_b@36 {
                			clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
					 	 <&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					clock-frequency = <24000000>;
                    			snr-role = <0>;
					reset-gpios = <&tca6408_20 1 GPIO_ACTIVE_HIGH>;
				};
			};
			i2c_2:i2c@2 {
				reg = <2>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-mux,deselect-on-exit;
				rbpcv3_sc432ai_c@36 {
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
						 <&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					clock-frequency = <24000000>;
                    snr-role = <0>;
					reset-gpios = <&tca6408_20 2 GPIO_ACTIVE_HIGH>;
				};
			};
			i2c_3:i2c@3 {
				reg = <3>;
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-mux,deselect-on-exit;
				rbpcv3_sc432ai_d@36 {
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
						 <&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					clock-frequency = <24000000>;
                    snr-role = <0>;
					reset-gpios = <&tca6408_20 3 GPIO_ACTIVE_HIGH>;
				};
			};
		};		
	};
};